Pick and Place Silicon on Insulator Microassembly

Deep reactive ion etching into Silicon on Insulator (SOI) wafers is a popular method of fabricating high-performance MEMS devices. These include electrostatic and thermal actuators, flexures that guide very precise motion, and ultra-flat and smooth reflectors to make micro-mirrors. An important limitation of SOI-based MEMS is that it is not easy to achieve a large range of out-of-plane motion without a complex fabrication process. This is because of the difficulty in breaking symmetry in the vertical direction: the actuator forces line up with the flexures that keep the parts moving in plane. Serial pick and place microassembly provides a solution to this problem by allowing us to create complex mechanisms in a simple process, then rotate these mechanisms ninety degrees out of plane to convert the in-plane motion that SOI-based technology excels at to out-of-plane motion. This approach improves processing yield and manufacturability while drastically reducing design cycle time compared with other solutions to the out-of-plane motion problem. This dissertation describes the novel micro-tooling used to pick up parts and automatically rotate them ninety degrees out of plane, a Zero Insertion Force (ZIF) connector technology that forms a strong permanent mechanical and electrical connection between the assembled parts and the rest of the chip, and several one- and two-axis out-of-plane rotation mechanisms that rival the performance of anything in the literature. All of these items were built in the same single-mask SOI process.
Publication date: 
December 31, 2005
Publication type: 
Ph.D. Dissertation
Last, M. E. (2005). Pick and Place Silicon on Insulator Microassembly. United States: University of California, Berkeley.

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