Poly cystalline silicon (poly-Si) and silicon dioxide (SiO2) are the standard strucutral and sacrifical materials in surface micromachines MEMS. Polycrystalline silicon-germanium (poly-SiGe) can be deposited in a standard LPCVD furnace at much lower temperatures (less than or equal to 450degC) than poly-Si. This allows integration of poly-SiGe MEMS after completion of a CMOS process with Al or Cu interconnects. Modularly integrating MEMS onto wafers with standard CMOS circuits reduces parasitics, increases packaging simplicity and reliability, could lower processing cost, allows for multiple, aligned sensors and allows for CMOS foundries to be used to obtain state-of-the-art CMOS devices.
Two integrations processes have been developed to fabricate poly-SiGe MEMEs after CMOS with Al-Si(2%) interconnect. For the first, the structural film is n-type poly-Ge and the sacrificial film is SiO2. Both films are deposited at 400degC, and a 550degC, 30s rapid thermal anneal (RTA) lowers the resistivity and stress gradient of the structural poly-Ge. The thermal budget of the MEMS fabrication steps is low enough not to cause junction spiking with the Al-Si(2%) interconnect. An amorphous Si layer protects the electronics from the HF release of the MEMS. The structural poly-GE after RTA has a resistivity of 5.6 mOhms-cm, a stress of 200 MPa (tensile), a strain gradient of less than 6*10^-6 um^-1, a fracture strain of 1.1% +/-0.3%, and resonators have a Q as high as ~30,000.
The second integration process uses p-type poly-Si0.33Ge0.67 as the structural layer and poly-Ge as the sacrificial layer. The structural poly-Si0.33Ge0.67 is deposited at 450degC, and the sacrificial poly-Ge is deposited at 400degC. No anneal of the structural layer is needed, since the in-situ boron-doped poly-Si0.33Ge0.67 has a resistivity of 1.8mohm-cm, a stress of -10 MPa (comprehensive), a strain gradient of 1.9*10^-4 um_1, a fracture strain of 1.2% +/-0.1%, and resonators have a Q as high as ~15,000. The MEMS thermal budget is low enough not to affect the on-chip CMOS. Hydrogen peroxide (H2O2) etches the sacrificial poly-Ge without significantly etching the poly-SiGe structural layer, SiO2, or Al-Si(2%). Therefore no special passivation of the CMOS is needed and Al bond pads can be exposed during the release.