Polycrystalline Silicon-Germanium Contact Resistance Study for Integrated MEMS Technology


Co-fabrication of surface micromachined micro-electromechanical devices and control electronics is advantageous for reducing cost and improving performance of microsystems[l]- [8]. With the MEMS and electronic circuits on separate chips, the parasitic capacitance and resistance of interconnects, bond pads, and bond wires can attenuate the signal and contribute significant noise. Batch fabrication of multiple integrated MEMS devices could also provide higher yield, smaller device size and lower power consumption. Eliminating wire bonds for interconnecting MEMS and ICs could potentially result in lower manufacturing cost as well as reduced complexity of packaging processes, and eventually offer more reliable systems. However, in order to achieve a high performance modularly integrated MEMS technology, many issues still need to be resolved. In addition to lowering the thermal budget of the MEMS process in order to avoid damaging CMOS interconnects, one important concern is to achieve a low contact resistance between the MEMS and the electronics. Ideally, the MEMS layers should be deposited directly on top of the metal interconnects to minimize parasitic resistances and capacitances which can degrade the system perfonnance [8].

Publication date: 
June 30, 2003
Publication type: 
Master's Thesis
Eyoum, M. N. (2003). Polycrystalline Silicon-germanium Contact Resistance Study for Integrated MEMS Technology: Research Project. United States: University of California, Berkeley.

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