Design of Nano-Materials For High Performance Electronic and Sensory Applications

Device scaling has been one of the main driving forces for technology advancement in the semiconductor industry over last few decades. As this scaling continues into the future, serious fundamental and technological issues will arise as a result of the limitations of conventional device fabrication and materials, etc. Among these many challenges, in particular, there is a tremendous need for new processing technologies to control atomic composition in semiconductor structures as well as the application of new nanoscale high electronic mobility channel materials. In this dissertation, new nanoscale doping and nano-materials assembly approaches in electronic and sensor applications will be presented to tackle those challenges.
Monolayer doping (MLD) is studied for the controllable, reliable and nanoscale doping of semiconductor materials by taking advantage of the crystalline nature and its self-limiting surface reaction properties. This method relies on the formation of a highly uniform and covalently bonded monolayer of dopant-containing molecules, which allows for deterministic positioning of dopant atoms on semiconductor surfaces. In a subsequent annealing step, the dopant atoms are diffused into the crystal lattice to attain the desired doping profile. Notably, the dopant areal dose can be tuned by utilization of the structural design of the molecular precursor. Combined with conventional spike annealing, the formation of sub-5 nm ultrashallow junctions (USJs) in Si has been achieved with ~70% of the incorporated dopants being activated. In addition, this doping method is extended to compound semiconductors to enable 5 nm sulfur-doped junctions in indium arsenide, yielding n+/p USJs with the diodes exhibiting rectifying or negative differential resistance (NDR) behavior, depending on the background dopant concentration.
Additionally, high-mobility nanomaterials such as indium arsenide nanowires have been characterized in detail, mainly on the intrinsic electron transport properties as a function of nanowire radius. From C-V characterizations, the densities of thermally-activated fixed charge and trap states on the surface of nanowires are investigated while enabling the accurate measurement of the gate oxide capacitance; therefore, leading to the direct assessment of electron mobility. The field-effect mobility is found to monotonically decrease as the radius is reduced to sub-10 nm with the low temperature transport data clearly highlighting the drastic impact of surface roughness scattering on the mobility degradation of miniaturized nanowires.
After the detailed characterization, wafer-scale assembly of highly ordered, dense, and regular arrays of nanowires with high uniformity and reproducibility through a simple contact printing process is investigated. The assembled NW pitch is shown to be readily modulated through the surface chemical treatment of the receiver substrate with the highest density approaching ~8 NW/μm, ~95% directional alignment, and wafer-scale uniformity. Such fine control in the assembly is attained by applying a lubricant during the contact printing process which significantly minimizes the NW-NW mechanical interactions, therefore enabling well-controlled transfer of nanowires through surface chemical binding interactions. Furthermore, the printing approach enables the large-scale integration of NW arrays for heterogeneous, multi-functional circuitry that utilizes both the sensory and electronic functionalities of single crystalline nanomaterials. Highly ordered and parallel arrays of optically active CdSe nanowires and high mobility Ge/Si nanowires are deterministically positioned on substrates and configured as photodiodes and transistors, respectively. The nanowire sensors and electronic devices are then interfaced to enable an all-nanowire circuitry with on-chip integration, capable of detecting and amplifying an optical signal with high sensitivity and precision. Moreover, the process is highly reproducible and scalable with a yield of ~80% functional circuits, therefore, enabling the fabrication of large arrays (i.e., 13x20) of nanowire photosensor circuitry with image sensing functionality.
The ability to control atomic composition in silicon structures, assemble nanowires uniformly in well-defined locations and then interface nanowires with integrated electronics on large scales and with high uniformity presents an important advance toward the integration of nanomaterials for electronic and sensor applications.
Johnny Chung Yin Ho
Yuri Suzuki
Oscar Dubon
Publication date: 
May 31, 2009
Publication type: 
Ph.D. Dissertation
Ho, J. C. Y. (2009). Design of Nano-materials for High Performance Electronic and Sensory Applications. (n.p.): University of California, Berkeley.

*Only registered BSAC Industrial Members may view project materials & publications. Click here to request member-only access.