Porous and Epitaxial 3C-SiC Thin Films Technology for Micro-electromechanical Systems and Electronics Applications

Silicon is a widely used semiconductor material because of such factors as its high quality, stable oxide, and low cost. However, silicon-based microdevices are not suitable for harsh environments, such as high temperature, intense vibrations, erosive flows, and corrosive media, because the electric properties of silicon degrades above 250 ̊C and mechanical properties degrades above 600 ̊C. Silicon carbide is a suitable material for harsh environment due to its wide bandgap, high breakdown electric field strength and high saturated electron drift velocity. In order for SiC to become a standard microelectronic and micromachining material used for harsh environment, high quality and low cost SiC thin films deposition technology need to be investigated.

This work describes the development and characterization of a horizontal hot-wall low pressure chemical vapor deposition (LPCVD) to deposit porous, polycrystalline and epitaxial 3C-SiC thin films from the low cost precursor methyltrichlorosilane (MTS) and hydrogen as a carrier gas. A home-built LPCVD reactor, with inner diameter of 1” and with pump oil filtration system has been set up for SiC films deposition process.

Naturally formed porous polycrystalline 3C-SiC films are formed by feeding procedure I. In this procedure, the hydrogen gas is allowed to flow into the reactor while the substrate is being heated while the MTS is introduced once the deposition temperature is reached. Two types of hole defects, namely pinholes and pits, are found in the porous films. Varying the deposition temperature is found to affect the pore diameter and density, with the SiC film grown at 1200 ̊C, the highest accessible temperature in the reactor, having the largest pore density.

Continuous polycrystalline 3C-SiC films on silicon are obtained by adjusting the feeding procedure such that MTS and hydrogen are introduced simultaneously at 800 ̊C while the substrate is being heated to the desired deposition temperature. Heteroepitaxy of SiC film on Si(100) is achieved at temperature 1200 ̊C. Triangular void defects with 2 major (111) direction and (100) truncated facet into the Si substrate are found at Si/SiC interface. Bi-layer scheme involving the growth of a thin SiC buffer layer using 1,3-disilabutane (DSB) at 925 ̊C first is explored to avoid Si outdiffusion at high temperature above 1050 ̊C. Voids free 1.7 μm epitaxial film are obtained with 80 nm SiC buffer layer at 1200 ̊C. Precise control of the buffer layer thickness and concentration of MTS are considered to be the major factors for the epitaxial film growth.

Different feeding procedures are applied to achieve homoepitaxy of SiC on 4H-SiC wafers. 4H-SiC films with 3C-SiC inclusions and high quality 3C-SiC are obtained at 1200 ̊C by varying the feeding procedure.

A possible method for reducing the need for SiC etching technology, namely selective growth of SiC on SiO2-mask silicon, has been explored. Selective growth of SiC is achieved at 1050 ̊C. Further increasing the temperature is found to make the mask unstable and lead to the nucleation of SiC particles on SiO2 surface. These particles can be subsequently removed upon the removal of the SiO2 masking lay