An SOI Process for Integrated Solar Power, Circuitry and Actuators for Autonomous Microelectromechanical Systems


A new process has been developed for fabricating integrated, solar-powered microelectromechanical systems (MEMS) on a silicon-on-insulator (SOI) wafer. The process provides for the fabrication of high voltage solar cell arrays, high aspect ratio electrostatic actuators and high voltage switches which can be controlled with a low voltage input. To demonstrate the capabilities of this process, an electrostatic actuator was operated with power provided by an on-chip solar array and controlled with an on-chip power switch. 

One of the primary challenges in creating a successful autonomous microsystem, such as a microrobot or a distributed sensor node, is providing sufficient power. If electrostatic actuation is used, the power should be both high in voltage for effective operation and sustainable to extend the usefulness of the device. Using a large number of solar cells wired in series solves both of these problems. Furthermore, by integrating the fabrication of the solar cells with the other elements of the microsystem, the complete device can be simplified and its size can be minimized. 

Three versions of the process are presented which differ in fabrication complexity and circuit capabilities. The most basic variation, which requires only one dopant drive-in step, can provide NMOS circuits and uses metal for the gates of the FETs. The next step up provides CMOS circuitry while still using metal gates. However, this added capability requires an extra drive-in step. The final version provides CMOS circuits with self-aligned polysilicon gates which has improved performance and reduced size for the circuitry but is more difficult to fabricate. Some of the other features of this process include the following: a highly doped back surface field and an anti-reflective oxide layer over the solar cells to improve efficiency; isolation trenches etched through the device layer and backfilled with nitride and undoped polysilicon; a second metal layer to provide a light block for the circuit elements; and a layer of germanium which is deposited over the solar cells and circuits to protect them during the HF release of the electrostatic actuators. 

This process has been used to fabricate solar cells with up to 200 cells wired in series. The best performance for a 20 cell array had an estimated efficiency of 11.7% under solar illumination. The highest voltage achieved was 88.5 V from an array with 200 cells. The efficiency of this array was estimated at 8.3%. To provide effective switching, the transistors need to have a high drain-to-source breakdown voltage and a low threshold voltage. The NMOS transistors had a breakdown voltage greater than 25 V and a threshold voltage of approximately 2.25 V The simplest switch which has been fabricated in this process is an NMOS transistor with a pull-up resistor. This switch has been shown to effectively switch a 25 V signal with an input less than 5 V Gap-closing, electrostatic actuators have also been fabricated and successfully operated with power provided by an on-chip solar array and controlled by an on-chip switch.

Publication date: 
May 31, 2002
Publication type: 
Ph.D. Dissertation
Colby Lenn Bellew and Albert P. Pisano. 2002. An soi process for integrated solar power, circuitry and actuators for autonomous microelectromechanical systems. Ph.D. Dissertation. University of California, Berkeley.

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