For the last decade, the size of complete 2.4GHz wireless modules containing everything but power have stagnated at ~1cm x 1cm. This is despite continued advances in semiconductor processes due to components needed by the core communication IC. Breaking this size barrier (which also sets a power and cost barrier) by eliminating all off-chip components is the goal of the Single-Chip Mote project, of which this dissertation is a part. The major components to be eliminated are antenna, battery, and crystal oscillator. Without these components, a complete wireless module could be the size of the RFIC silicon a few millimeters on a side, or less, instead of the size of the supporting PCB.
Once those components are eliminated, advances in process scaling will lead to another size floor defined by the size of inductors, which do not scale with process. Inductor-based oscillators also put a floor on power consumption (dictated by desired swing versus achievable inductor quality factor) and, not being representable by digital cells, cannot be part of an integrated synthesis flow.
In light of these limitations, understanding to what extent relaxation oscillators (the non-resonant oscillator family including RC oscillators and ring oscillators) can be used for communication is necessary to establish inductor-free performance limits and, more importantly, is necessary for future Single-Chip Mote scaling.
Contrary to general opinion, FSK communication systems based on free-running RF ring oscillators do not exhibit catastrophically poor performance but are capable of good packet delivery rate (PDR 99% or better) with moderately higher tone spacing compared to typical low-power wireless specifications (~2x when communicating with COTS base station, ~6x when communicating to another ring-based radio).
Methods to work around the high jitter of rings are established; this jitter is dominated by flicker noise and is poorly represented by simulators, making accurate simulation-based design difficult. Communication and complete sensor systems can be demonstrated, and system-level chip design at the core of this work can be taught to successive generations by adopting an industrial project-based approach.
Updates and errata to this dissertation can be found at: http://people.eecs.berkeley.edu/~db/dissertation/