Current quantum processor units (QPUs) have achieved over 1,000 qubits (e.g., IBM's Condor processor). However, scaling quantum platforms toward 1 million qubits demands breakthroughs in quantum hardware, connectivity, error correction, and system architecture. To address the scalability of quantum interconnects, Cryo-CMOS control and readout circuits have demonstrated efficacy in reducing wiring complexity, latency, and thermal loads. However, the CMOS circuits limit the active heat load to 1–2 mW/qubit, imposing a limit of approximately 1,000 qubits in state-of-the-art dilution refrigerators. In a different approach, SEEQC employs a rapid single-flux quantum (R-SFQ) superconducting processor to digitally control qubit arrays through direct chip-to-chip integration at the mK. This deep integration offers an efficient and scalable solution, yet exciting SFQ logics still necessitate GHz electronics in cryo-CMOS at 4K, albeit with much relaxed specifications and, thus an improved power efficiency. Alternatively, RF-photonics links utilizing wavelength division multiplexing (WDM) have been proposed recently to replace RF cables and cryo-CMOS controllers with low-thermal-conductivity optical fibers and light-load photonic receivers at the 4K stage. While this approach shows promise for reducing For thermal loads, only preliminary thermal analyses have been conducted, and they lack implementation and linearity assessments.
In this project, we aim to develop WDM end-to-end RF-photonics links in GlobalFoundries 45SPCLO silicon photonics process to interface SEEQC SFQ superconducting controller, addressing the needs for energy-efficient and scalable quantum interconnects.
Project is currently funded by: Other