The project amis at using Near Field Electrospinnin to fabricate top gate graphene transistor that is capable to pattern the source and drain electrodes through a self-alignment process, and the long range goals is to direct writing graphene transistors onto flexible and transparent substrate for low cost circuit applications, say RF mixer. As the conventional top gated device fabrication process often introduces the deposition of thin inorganic dielectric onto graphene layer with extra surface functionalizations, leading to an undesired damage of graphene lattice, or a non-ideal device geometry with excessive serial resistance or parasitic capacitance, here we investigate a self-aligned top gate graphene transistor process that could address those challenges by directly writing organic gate dielectrics onto graphene channel and precisely position the source, drain and gate electrode by self-alignment without significant overlappings or gaps between electrodes.
Project end date: 08/15/14