BPN981: Suppressing Energy Losses in Compact Superconducting Qubits


State-of-the-art quantum computers currently have qubit gate error rates that are too large for practical computing. Quantum error correction can protect computations from physical errors by encoding logical qubits in many physical qubits. However, physical qubit error rates need to be sufficiently low to minimize resource overhead and suppress errors. As a result, compact qubit designs with small dissipation and error rates are crucial to scaling up a fault-tolerant quantum computer. In this project, we aim to address the scaling up of superconducting quantum processors by developing superconducting qubits that are both compact, and have small error rates. To address compactness, we are developing superconducting transmon qubits with a three orders of magnitude smaller footprint by using small-gap parallel plate capacitors, the geometry with the largest capacitance per area and smallest qubit footprint. This geometry is traditionally not used in superconducting qubit designs because they suffer from large dissipation due to high energy participation ratio in lossy dielectric thin films. In our design, we are using phononic bandgap materials to avoid the dominant dissipation mechanism caused by atomic-scale defects in the dielectric. We will discuss our progress on the design, fabrication and characterization of compact superconducting qubits that might enable scalable quantum processors.

Project ended: 03/08/2023

Publication date: 
August 23, 2022
Publication type: 
BSAC Project Materials (Final/Archive)
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