Abstract:
Develop new background calibration techniques for low power digitally assisted Analog-to-Digital Converters (ADCs). The goal is achieve significant savings in convergence time. A proof-of-concept FPGA realization calibration module will be built for a 12-bit, 75-MS/s demonstration prototype previously developed by Boris Murmann.
Project end date: 01/20/05
Publication date:
September 10, 2004
Publication type:
BSAC Project Materials (Final/Archive)
Citation:
PREPUBLICATION DATA - ©University of California 2004