In this work, design of capacitive accelerometers with CMOS electronics is investigated. The goal of this investigation is to form accurate behavioral models at three different levels of abstraction: system, electrical, and mechanical. Analysis of these models permits a deeper understanding of both accelerometer design and design trade-offs. The results of this work are used to obtain an accurate prediction of accelerometer performance. At the system level, simultaneous force-balancing and analog-to-digital...
