BSAC Seminar: Integration of Nanowires for Electronics: from 2D to 3D

September 30, 2008

Dr. Zhiyong Fan

BSAC Graduate Student Researcher
September 30, 2008 | 12:30 to 01:30 | 521 Cory Hall, Hogan Room
Host: Richard Lossing

Semiconductor nanowires have been extensively explored as the potential building blocks for a variety of electronic and optoelectronic applications due to the continuous increased demand for miniaturized devices and circuits. However, controlled and uniform assembly of "bottom-up" nanowire (NW) materials with high scalability is one of the major bottleneck challenges towards the integration of nanowires for circuit applications. In our work, we have achieved wafer-scale assembly of highly ordered arrays of NWs through a simple contact printing method with high uniformity and reproducibility. This assembly approach is generic and a wide range of semiconductor NWs made of Si, Ge, ZnO, InAs, CdSe, etc, have been successfully assembled and integrated at large-scale. Arrays of these NWs were configured as a variety of functional electronic and optoelectronic devices, including high performance field-effect transistors, Schottky diodes and photodiodes on both Si and plastic substrates. Meanwhile, we have demonstrated integration of these function component to build image sensing circuitry. In parallel to assemble nanowires on 2D planar substrates, we have also developed approach to directly assemble nanowires into 3D array with density ~10^10/cm^2 in porous dielectric templates. The nanowire arrays have large scale high regularity with tunable inter-nanowire spacing, thus have potential applications for photonics and integrated nanoelectronics. We have fabricated photovoltaic devices based on these 3D nanowire arrays utilizing single crystalline nature of the nanowires and large surface area. These devices have shown capability of solar energy conversion with reasonable efficiency.

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Jonathan Candelaria
Dalene Schwartz Corey