Prof. Hayden Taylor
School of Mechanical and Aerospace Engineering, Nanyang Technological University, Singapore
October 23, 2012 | 12:00 to 01:00 | 540 Cory Hall, DOP Center Conference Room
Host: Kameshwar Poolla
Nanoimprint lithography (NIL) offers sub-10 nm patterning resolution with lower capital costs than competing technologies. To be adopted widely in data storage and semiconductor manufacturing, however, NIL’s throughput needs to increase and its defect rate needs to fall. One way of improving NIL’s throughput and yield is to develop comprehensive models of the process that can be used to guide device designers and process engineers. Over the last five years we have been developing a computationally inexpensive simulation technique for NIL. The technique captures the deformation behaviour of the imprinted polymeric film via its mechanical impulse response, and describes elastic deformations of the stamp using a point-load response. We have developed the technique to simulate chip-scale patterns containing many millions of features, and to model NIL using both thermoplastics and ultraviolet-curing resins. I will describe the simulation techniques and how we have applied them to: (i) optimise process parameters, (ii) select materials for the imprinting stamp, and (iii) guide the optimization of the imprinted pattern itself.
research.ntu.edu.sg/expertise/academicprofile/pages/StaffProfile.aspx?ST_EMAILID=HKT
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